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21.

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Introduction to logic synthesis using verilog HDL / by Robert B. Reese and Mitchell A. Thornton by

Language: English

Publication details: Morgan : Springer, 2022

Availability: Items available for loan: Central Library, IIT Bhubaneswar (6)Call number: 621.395 REE/I, ... Items available for reference: Central Library, IIT Bhubaneswar: Not for loan (1)Call number: 621.395 REE/I.

22.

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Digital design and computer architecture / David Money Harris and Sarah L. Harris. by

Edition: 2nd ed.

Material type:

Text; Format: print ; Literary form: Not fiction

Language: English

Publication details: Amsterdam : Morgan Kaufmann, 2019

Availability: Items available for loan: Central Library, IIT Bhubaneswar (3)Call number: 621.381 HAR/D, ... Items available for reference: Central Library, IIT Bhubaneswar: Not for loan (1)Call number: 621.381 HAR/D. Not available: Central Library, IIT Bhubaneswar: Checked out (6).

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Your search returned 22 results.