TY  - BOOK
AU  - Kammari, Raviteja,
AU  - Pasupureddi, Vijay Shankar,
TI  - Sub-sampling mixer-first beamforming RF front-ends with integrated impedance matching in 1.2 V, 65 nm CMOS
U1  - 621.3815 
PY  - 2026///
CY  - Bhubaneswar
PB  - IIT Bhubaneswar
KW  - Radio frequency circuits
KW  - Design and construction
KW  - Integrated circuits
KW  - CMOS technology
KW  - Mixers (Electronics)
N1  - Includes bibliographical references and index
N2  - Sub-sampling mixer-first beamforming RF front-ends with integrated impedance matching in 1.2 V, 65 nm CMOS: This thesis focuses on the design and development of low-power RF receiver front-ends using sub-sampling mixer-first architectures for beamforming and MIMO wireless communication systems. It addresses major challenges in sub-sampling receivers, including RF-port impedance matching, noise folding, direct down-conversion, harmonic interference, and power consumption. The research investigates how impedance matching can be integrated into mixer-first architectures while maintaining efficient RF signal reception and supporting beamforming applications. Implemented using 1.2 V, 65 nm CMOS technology, the work contributes to compact and energy-efficient RF front-end solutions suitable for modern wireless communication systems and spatial interference mitigation. Related IIT Bhubaneswar work by Kammari and collaborators demonstrates the feasibility of sub-sampling mixer-first architectures with integrated impedance-matching techniques in this CMOS technology
ER  -