000 | 00914cam a2200265 a 4500 | ||
---|---|---|---|
001 | 10916 | ||
003 | IN-BhIIT | ||
005 | 20240520120301.0 | ||
008 | 051115s2006 nyua b 001 0 eng | ||
020 | _a9780387310046 | ||
040 | _aIN-BhIIT | ||
041 | _aeng | ||
082 | 0 | 0 |
_a621.395 _bHAC/L |
100 | 1 |
_aHachtel, Gary D. _eAuthor _923391 |
|
245 | 1 | 0 |
_aLogic synthesis and verification algorithms / _cby Gary Hachtel and Fabio Somenzi. |
260 |
_aNew York : _bSpringer, _cc2006. |
||
300 |
_axxxii, 564 p. : _bill. ; _c26 cm. |
||
504 | _aIncludes bibliographical references and index. | ||
650 | 0 |
_aIntegrated circuits _xVery large scale integration _xDesign _xData processing. _923392 |
|
650 | 0 |
_aLogic design _xData processing. _923393 |
|
650 | 0 |
_aIntegrated circuits _xVerification. _923394 |
|
650 | 0 |
_aComputer-aided design. _91496 |
|
700 | 1 |
_aSomenzi, Fabio. _eJoint author _923395 |
|
942 | _cTRB | ||
999 |
_c13907 _d13907 |