Multi-net optimization of VLSI Interconnect / Konstantin Moiseev, Avinoam Kolodny and Shmuel Wimer
Material type:![Text](/opac-tmpl/lib/famfamfam/BK.png)
- 9781493942626
- 621.3815 MOI/M
Item type | Current library | Home library | Collection | Call number | Status | Date due | Barcode | Item holds | |
---|---|---|---|---|---|---|---|---|---|
![]() |
Central Library, IIT Bhubaneswar | Central Library, IIT Bhubaneswar | SES | 621.3815 MOI/M (Browse shelf(Opens below)) | Available | 9650 |
This book examines design and migration methodologies for optimizing multi-net wire structures in advanced VLSI interconnects, covering scaling-dependent models for interconnect power, interconnect delay and crosstalk noise, plus design optimization problems.
There are no comments on this title.