Padmanabhan, T. R. <br/><br/>
Design through Verilog HDL / 
T. R. Padmanabhan and B. Bala Tripura Sundari 
 - New Delhi :  Wiley,  c2004. 
 - xii, 455p. ;  24 cm. 
<br/><br/><label>ISBN: </label>9788126519316 
<br/><br/><label>Subjects--Topical Terms: </label><br/>Electrical and Electronics Engineering<br/>VHDL
<br/><br/><label>Dewey Class. No.: </label>621.392  / PAD/T