Chip design for submicron VLSI : CMOS layout and simulation / by John P. Uyemura

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Material type: Text

TextLanguage: English Publication details: New Delhi : Cengage India Pvt. Ltd., 2017. Description: xiii, 411 p. : illustration ; 24cm. + CDISBN:

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Holdings
Item type	Current library	Home library	Collection	Call number	Status	Date due	Barcode	Item holds
Technical Reference Book	Central Library, IIT Bhubaneswar	Central Library, IIT Bhubaneswar	SES	621.3815 UYE/C (Browse shelf(Opens below))	Available		8974

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Includes bibliographical references and index.

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